The present application relates generally to the field of semiconductor manufacturing, and more particularly to a method for patterning a masking layer for creating ultrafine structures.
During the fabrication of semiconductor devices, features of the device on a semiconductor substrate are commonly defined by a patterned mask. To provide increased feature density, the feature size is reduced, which may be achieved by reducing the critical dimension (CD) of the features. The foregoing requires improved patterning resolution, precision and accuracy.